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chacha/asm/chacha-ppc.pl: optimize AltiVec/VMX code path.
32-bit vector rotate instruction was defined from beginning, it not being used from the start must be a brain-slip... Reviewed-by: Bernd Edlinger <bernd.edlinger@hotmail.de> Reviewed-by: Rich Salz <rsalz@openssl.org> (Merged from https://github.com/openssl/openssl/pull/6363)
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@ -23,11 +23,14 @@
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# IALU/gcc-4.x 3xAltiVec+1xIALU
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#
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# Freescale e300 13.6/+115% -
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# PPC74x0/G4e 6.81/+310% 4.66
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# PPC970/G5 9.29/+160% 4.60
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# POWER7 8.62/+61% 4.27
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# POWER8 8.70/+51% 3.96
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# POWER9 6.61/+29% 3.67
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# PPC74x0/G4e 6.81/+310% 3.72
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# PPC970/G5 9.29/+160% ?
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# POWER7 8.62/+61% 3.38
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# POWER8 8.70/+51% 3.36
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# POWER9 6.61/+29% 3.30(*)
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#
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# (*) this is trade-off result, it's possible to improve it, but
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# then it would negatively affect all others;
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$flavour = shift;
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@ -392,19 +395,19 @@ Loop_tail: # byte-by-byte loop
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___
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{{{
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my ($A0,$B0,$C0,$D0,$A1,$B1,$C1,$D1,$A2,$B2,$C2,$D2,$T0,$T1,$T2) =
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map("v$_",(0..14));
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my (@K)=map("v$_",(15..20));
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my ($FOUR,$sixteen,$twenty4,$twenty,$twelve,$twenty5,$seven) =
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map("v$_",(21..27));
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my ($inpperm,$outperm,$outmask) = map("v$_",(28..30));
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my @D=("v31",$seven,$T0,$T1,$T2);
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my ($A0,$B0,$C0,$D0,$A1,$B1,$C1,$D1,$A2,$B2,$C2,$D2)
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= map("v$_",(0..11));
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my @K = map("v$_",(12..17));
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my ($FOUR,$sixteen,$twenty4) = map("v$_",(18..20));
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my ($inpperm,$outperm,$outmask) = map("v$_",(21..23));
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my @D = map("v$_",(24..28));
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my ($twelve,$seven,$T0,$T1) = @D;
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my $FRAME=$LOCALS+64+13*16+18*$SIZE_T; # 13*16 is for v20-v31 offload
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my $FRAME=$LOCALS+64+10*16+18*$SIZE_T; # 10*16 is for v20-v28 offload
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sub VMXROUND {
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my $odd = pop;
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my ($a,$b,$c,$d,$t)=@_;
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my ($a,$b,$c,$d)=@_;
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(
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"&vadduwm ('$a','$a','$b')",
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@ -412,20 +415,16 @@ my ($a,$b,$c,$d,$t)=@_;
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"&vperm ('$d','$d','$d','$sixteen')",
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"&vadduwm ('$c','$c','$d')",
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"&vxor ('$t','$b','$c')",
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"&vsrw ('$b','$t','$twenty')",
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"&vslw ('$t','$t','$twelve')",
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"&vor ('$b','$b','$t')",
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"&vxor ('$b','$b','$c')",
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"&vrlw ('$b','$b','$twelve')",
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"&vadduwm ('$a','$a','$b')",
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"&vxor ('$d','$d','$a')",
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"&vperm ('$d','$d','$d','$twenty4')",
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"&vadduwm ('$c','$c','$d')",
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"&vxor ('$t','$b','$c')",
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"&vsrw ('$b','$t','$twenty5')",
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"&vslw ('$t','$t','$seven')",
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"&vor ('$b','$b','$t')",
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"&vxor ('$b','$b','$c')",
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"&vrlw ('$b','$b','$seven')",
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"&vsldoi ('$c','$c','$c',8)",
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"&vsldoi ('$b','$b','$b',$odd?4:12)",
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@ -461,13 +460,7 @@ $code.=<<___;
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stvx v26,r10,$sp
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addi r10,r10,32
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stvx v27,r11,$sp
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addi r11,r11,32
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stvx v28,r10,$sp
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addi r10,r10,32
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stvx v29,r11,$sp
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addi r11,r11,32
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stvx v30,r10,$sp
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stvx v31,r11,$sp
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stw r12,`$FRAME-$SIZE_T*18-4`($sp) # save vrsave
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$PUSH r14,`$FRAME-$SIZE_T*18`($sp)
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$PUSH r15,`$FRAME-$SIZE_T*17`($sp)
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@ -487,9 +480,9 @@ $code.=<<___;
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$PUSH r29,`$FRAME-$SIZE_T*3`($sp)
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$PUSH r30,`$FRAME-$SIZE_T*2`($sp)
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$PUSH r31,`$FRAME-$SIZE_T*1`($sp)
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li r12,-1
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li r12,-8
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$PUSH r0, `$FRAME+$LRSAVE`($sp)
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mtspr 256,r12 # preserve all AltiVec registers
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mtspr 256,r12 # preserve 29 AltiVec registers
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bl Lconsts # returns pointer Lsigma in r12
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li @x[0],16
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@ -526,11 +519,6 @@ $code.=<<___;
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lwz @d[3],12($ctr)
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vadduwm @K[5],@K[4],@K[5]
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vspltisw $twenty,-12 # synthesize constants
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vspltisw $twelve,12
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vspltisw $twenty5,-7
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#vspltisw $seven,7 # synthesized in the loop
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vxor $T0,$T0,$T0 # 0x00..00
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vspltisw $outmask,-1 # 0xff..ff
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?lvsr $inpperm,0,$inp # prepare for unaligned load
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@ -543,6 +531,7 @@ $code.=<<___;
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be?vxor $outperm,$outperm,$T1
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be?vperm $inpperm,$inpperm,$inpperm,$T0
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li r0,10 # inner loop counter
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b Loop_outer_vmx
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.align 4
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@ -560,7 +549,6 @@ Loop_outer_vmx:
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ori @x[3],@x[3],0x6574
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vmr $B0,@K[1]
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li r0,10 # inner loop counter
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lwz @x[4],0($key) # load key to GPR
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vmr $B1,@K[1]
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lwz @x[5],4($key)
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@ -586,15 +574,17 @@ Loop_outer_vmx:
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mr @t[1],@x[5]
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mr @t[2],@x[6]
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mr @t[3],@x[7]
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vspltisw $twelve,12 # synthesize constants
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vspltisw $seven,7
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mtctr r0
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nop
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Loop_vmx:
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___
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my @thread0=&VMXROUND($A0,$B0,$C0,$D0,$T0,0);
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my @thread1=&VMXROUND($A1,$B1,$C1,$D1,$T1,0);
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my @thread2=&VMXROUND($A2,$B2,$C2,$D2,$T2,0);
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my @thread0=&VMXROUND($A0,$B0,$C0,$D0,0);
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my @thread1=&VMXROUND($A1,$B1,$C1,$D1,0);
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my @thread2=&VMXROUND($A2,$B2,$C2,$D2,0);
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my @thread3=&ROUND(0,4,8,12);
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foreach (@thread0) {
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@ -602,10 +592,11 @@ ___
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eval(shift(@thread1)); eval(shift(@thread3));
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eval(shift(@thread2)); eval(shift(@thread3));
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}
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foreach (@thread3) { eval; }
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@thread0=&VMXROUND($A0,$B0,$C0,$D0,$T0,1);
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@thread1=&VMXROUND($A1,$B1,$C1,$D1,$T1,1);
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@thread2=&VMXROUND($A2,$B2,$C2,$D2,$T2,1);
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@thread0=&VMXROUND($A0,$B0,$C0,$D0,1);
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@thread1=&VMXROUND($A1,$B1,$C1,$D1,1);
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@thread2=&VMXROUND($A2,$B2,$C2,$D2,1);
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@thread3=&ROUND(0,5,10,15);
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foreach (@thread0) {
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@ -613,6 +604,7 @@ ___
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eval(shift(@thread1)); eval(shift(@thread3));
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eval(shift(@thread2)); eval(shift(@thread3));
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}
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foreach (@thread3) { eval; }
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$code.=<<___;
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bdnz Loop_vmx
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@ -866,13 +858,7 @@ Ldone_vmx:
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lvx v26,r10,$sp
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addi r10,r10,32
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lvx v27,r11,$sp
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addi r11,r11,32
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lvx v28,r10,$sp
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addi r10,r10,32
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lvx v29,r11,$sp
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addi r11,r11,32
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lvx v30,r10,$sp
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lvx v31,r11,$sp
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$POP r0, `$FRAME+$LRSAVE`($sp)
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$POP r14,`$FRAME-$SIZE_T*18`($sp)
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$POP r15,`$FRAME-$SIZE_T*17`($sp)
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@ -904,7 +890,7 @@ Ldone_vmx:
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Lconsts:
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mflr r0
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bcl 20,31,\$+4
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mflr r12 #vvvvv "distance between . and _vpaes_consts
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mflr r12 #vvvvv "distance between . and Lsigma
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addi r12,r12,`64-8`
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mtlr r0
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blr
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